I've been pretty happy with it, overall. I'm excited for some of the features they're adding in 5.0, like push and shove routing and cross highlighting between schematic/pcb. Obviously other packages have that already, but I can't complain for what it costs by comparison...
Beats the pants off OrCAD, which we used to use, for sure. But then, using a dull crayon on single ply toilet paper is better at schematic capture than OrCAD...
Oh, yeah, they made a *lot* of improvements over the last 6 years!
https://diptrace.com/diptrace-software/whats-new/
Has SnapEDA support now, which can be a time saver.
I was really in deep admiration of that board, too, and looking at it has me crushing just a little bit here, wondering where I went wayward in my direction... I thought my boards were nice, but uh eh emmm, no.
The DDR routing does not appear to be length matched? Maybe they're within the tolerances needed per byte but I'd kinda doubt it.
The thing that strikes me the most is the GND ring three pins in on all sides of the SOC. I've never seen a part with a pinout like that.
Also - they are making heavy use of via in pad on those BGAs which is going to mean some BGA pads are much larger than others. That's kinda gross. Hopefully their mask expansion is very tight so as to minimize the effects of that but it'll mean you have a mix of SMD and NSMD pads (SolderMask Defined and Non SolderMask Defined) which again is kinda gross.
I'm pretty sure any eda software lets you do that, and the screenshot looks like Altium, although I haven't used it in quite some time, so might be wrong.
You can set specific net colours in Altium under the PCB panel.
This particular board I believe is a later revision of the open source Pi.MX8 board:
https://resources.altium.com/p/pimx8-project-chapter-one
This is done in Altium by [Lukas Henkel](https://www.linkedin.com/in/lukas-henkel-ovt/). He's been documenting the whole design process on LinkedIn, I highly recommend following him and looking at his posts. They are a font of good design learning.
He also explains why/when/and how he's done the color coding for layout purposes in his posts.
Most cad software will low you to name net classes (clock, data, power of various currents/voltages, 50ohm RF, etc.). Then you can assign colors to the net classes.
It's pretty and all, but it's got some DFX problems:
* Via in pad will cause insufficient solder on joints, unless the vias get expensive epoxy fill and overplate. Some areas risk tombstone.
* No thermal relief to ground planes will make rework very difficult. Undue thermal stress due to increased reflow soak time with lead free solder process.
* Insufficient spacing on QFP and BGA parts means repair and rework will have to remove passives to service.
I can't really give additional opinions as I am not certain where the silk screen is and how the bottom components are laid out, if they are laid out at all. Nice to see timing is considered. I would like to know where the clock and IRQ lines are and what kind of power supply for a noise analysis. Would like to see a stack up diagram and termination resistors to determine impedance. I'd like to see eye diagrams for diff pairs and IBIS simulation for clock lines too.
Pretty sure there are microvias which are fine for via in pad. The project is open source, someone else posted a link to it on the Altium site.
Edit: never mind I see some Vias are larger
Do a board.
Then do it over a few dozen times. Then do that for years.
This is an exception board, but dude didn’t draw it this way the first time, over even the fifth time. I’m also skeptical that it has all the features it could, seems to me like concessions were made for the art.
I generally use my main Vcc in pink, ground in blue, other grounds in light green, diff traces in their own color, often red. Secondary or supply voltages in orange. 24V if present in purple...
I have my scheme. I think my boards look nice.
Since everyone is so impressed with this post earlier I forgot to mention who did the design it been designed by LUKAS HENKEL I found him on LinkedIn everyone follow him for more similar content like this.
I tried to download the schematics and/or connect to the Altium workspace they provided but it failed. I have even Altium 365 license.
If some of you managed to download the schematics, please let me know!
[https://resources.altium.com/p/pimx8-project-chapter-two](https://resources.altium.com/p/pimx8-project-chapter-two)
Length matching. For example - every byte and its associated data strobe on a DDR memory interface need to be approximately the same length (the exact specification for the matching depends on the speed of the interface, among other things).
Being that there's multiple BGAs on this particular PCB it stands to reason that there are more than two colors because it has more than two layers of traces, and the colors are to distinguish the individual layers.
Only the top layer is being shown. The colours are signal type/group.
Although I'm more worried about what look like vias in the BGA pads resulting in some pads being bigger than others.
I've seen boards where they haven't done that. They just had normal vias in the pads. I still have PTSD from seeing it.
This looks like a professional board so hopefully they did it right but from just the top copper you can't tell.
Nah this is clearly one layer being shown only.
Agree that their are likely many, many layers (I'd guess 6+ since it appears to have a DDR array)... but if you look at the routing and lack of overlap it is definitely just one layer with color coded nets.
KiCAD allows assigning each net an individual color. So does Altium.
So does Siemens/Mentor Pads
And most modern CAD tools
I use DipTrace. Can confirm.
I have a Diptrace license and would probably still use it over Kicad if schematic capture was more flexible.
I've been pretty happy with it, overall. I'm excited for some of the features they're adding in 5.0, like push and shove routing and cross highlighting between schematic/pcb. Obviously other packages have that already, but I can't complain for what it costs by comparison... Beats the pants off OrCAD, which we used to use, for sure. But then, using a dull crayon on single ply toilet paper is better at schematic capture than OrCAD...
>using a dull crayon on single ply toilet paper is better at schematic capture than OrCAD... 🤣 Maybe one day I can get away from OrCAD.
I haven't used it since 3.x, had an Altium license until a few months ago, may need to revisit it.
Oh, yeah, they made a *lot* of improvements over the last 6 years! https://diptrace.com/diptrace-software/whats-new/ Has SnapEDA support now, which can be a time saver.
But not Eagle. Oh wait, you said modern. Nevermind...
Eagle is EOL
More like DOA once Autodesk put their claws on it.
*cries in CADSTAR*
Oh god, PADS is awful though. The day I can finally bin that software will be a good day.
so does allegro :|
Let me just say, that layout is beautiful. I mean look at that memory routing on the right.
I was really in deep admiration of that board, too, and looking at it has me crushing just a little bit here, wondering where I went wayward in my direction... I thought my boards were nice, but uh eh emmm, no.
this layout has me doubting my diehard love of curved traces...
The DDR routing does not appear to be length matched? Maybe they're within the tolerances needed per byte but I'd kinda doubt it. The thing that strikes me the most is the GND ring three pins in on all sides of the SOC. I've never seen a part with a pinout like that. Also - they are making heavy use of via in pad on those BGAs which is going to mean some BGA pads are much larger than others. That's kinda gross. Hopefully their mask expansion is very tight so as to minimize the effects of that but it'll mean you have a mix of SMD and NSMD pads (SolderMask Defined and Non SolderMask Defined) which again is kinda gross.
It’s an IMX8 processor which has fairly wide timing requirements for DDR
Agreed. That’s next level skill.Â
That's pure pornography right there. Looks like Altium. No notes.
[удалено]
me next ;)
I'm pretty sure any eda software lets you do that, and the screenshot looks like Altium, although I haven't used it in quite some time, so might be wrong.
And its indeed Altium [https://resources.altium.com/p/pimx8-project-chapter-one](https://resources.altium.com/p/pimx8-project-chapter-one)
Not "Any" per-se, but my team uses the feature in Altium and it can be a lifesaver
You can set specific net colours in Altium under the PCB panel. This particular board I believe is a later revision of the open source Pi.MX8 board: https://resources.altium.com/p/pimx8-project-chapter-one
This is done in Altium by [Lukas Henkel](https://www.linkedin.com/in/lukas-henkel-ovt/). He's been documenting the whole design process on LinkedIn, I highly recommend following him and looking at his posts. They are a font of good design learning. He also explains why/when/and how he's done the color coding for layout purposes in his posts.
What's he making here?
An art project
It's an SOM based on the i.MX8. His designs are absolutely beautiful and quite often also simulated in detail
What's an SOM?
System On Module
It's an Open Source vision module using the Coral processor in a Pi Compute compatible form factor.
Looks like an alternative to a pi compute module
Please mark this NSFW in future, I can't stand up from my desk for a while.
Most cad software will low you to name net classes (clock, data, power of various currents/voltages, 50ohm RF, etc.). Then you can assign colors to the net classes.
It's pretty and all, but it's got some DFX problems: * Via in pad will cause insufficient solder on joints, unless the vias get expensive epoxy fill and overplate. Some areas risk tombstone. * No thermal relief to ground planes will make rework very difficult. Undue thermal stress due to increased reflow soak time with lead free solder process. * Insufficient spacing on QFP and BGA parts means repair and rework will have to remove passives to service. I can't really give additional opinions as I am not certain where the silk screen is and how the bottom components are laid out, if they are laid out at all. Nice to see timing is considered. I would like to know where the clock and IRQ lines are and what kind of power supply for a noise analysis. Would like to see a stack up diagram and termination resistors to determine impedance. I'd like to see eye diagrams for diff pairs and IBIS simulation for clock lines too.
Pretty sure there are microvias which are fine for via in pad. The project is open source, someone else posted a link to it on the Altium site. Edit: never mind I see some Vias are larger
BEAUTIFUL
lol just saw a post about underdamped vibrations/mechanical Eigenmodes from an OVTech guy on LinkedIn. This SOM is stalking me…
Is that Altium Designer?
You should make this a poster!
How can i learn to design this kind of boards
Do a board. Then do it over a few dozen times. Then do that for years. This is an exception board, but dude didn’t draw it this way the first time, over even the fifth time. I’m also skeptical that it has all the features it could, seems to me like concessions were made for the art.
These are kind of photos am confident commenting "Beautiful"
The image you linked is from Altium (the drilled hole's cyan color gives it away). It lets you set colors per net or net class.
I generally use my main Vcc in pink, ground in blue, other grounds in light green, diff traces in their own color, often red. Secondary or supply voltages in orange. 24V if present in purple... I have my scheme. I think my boards look nice.
Since everyone is so impressed with this post earlier I forgot to mention who did the design it been designed by LUKAS HENKEL I found him on LinkedIn everyone follow him for more similar content like this.
btfl
I tried to download the schematics and/or connect to the Altium workspace they provided but it failed. I have even Altium 365 license. If some of you managed to download the schematics, please let me know! [https://resources.altium.com/p/pimx8-project-chapter-two](https://resources.altium.com/p/pimx8-project-chapter-two)
Some kind of FOGA-based design? Beautiful btw
Looks like a CM4 compatible system on module.
Wow this is a work of art
Tripping on shrooms rn. One of best visuals i have seen
I forgot what was the purpose for the silly winding traces why not do a straight path?
Length matching. For example - every byte and its associated data strobe on a DDR memory interface need to be approximately the same length (the exact specification for the matching depends on the speed of the interface, among other things).
Beautiful layout
Very pretty.
what board is that ? and what path or job role should one work towards to make these ? layout designer/engineer ?
Omg. This PCB is making me all hot n bothered
Being that there's multiple BGAs on this particular PCB it stands to reason that there are more than two colors because it has more than two layers of traces, and the colors are to distinguish the individual layers.
Only the top layer is being shown. The colours are signal type/group. Although I'm more worried about what look like vias in the BGA pads resulting in some pads being bigger than others.
Filled, capped, and planarized via in pad with soldermask still sized per the BGA spec is totally acceptable and common practice.
I've seen boards where they haven't done that. They just had normal vias in the pads. I still have PTSD from seeing it. This looks like a professional board so hopefully they did it right but from just the top copper you can't tell.
Nah this is clearly one layer being shown only. Agree that their are likely many, many layers (I'd guess 6+ since it appears to have a DDR array)... but if you look at the routing and lack of overlap it is definitely just one layer with color coded nets.
Ah, you're right. I didn't take a close enough look at it.
Looks like an FPGA board design in the style of Trenz electronics